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1/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. large current external fet switching regulator controllers high efficiency step-down switching regulator controller BD9775FV description BD9775FV is switching controller with synchronous rectificat ion (BD9775FV is 1channel sync hronous rectification) and wide input range. it can contribute to ecological design (low er power consumption) for most of electronic equipments. features 1) 2channel step-down dc/dc fet driver 2) synchronous rectification for channel 2 3) able to synchronize to an external clock signal 4) over current protection (ocp) by monitoring vds of p channel fet 5) short circuit protection (scp) by delay time and latch method 6) under voltage lock out (uvlo) 7) thermal shut down (tsd) 8) package: ssop-b28 applications car navigation system, car audio, display, flat tv absolute maximum ratings (ta=25 ) parameter symbol ratings unit supply voltage (vcc to gnd) vcc 36 v vref to gnd voltage vref 7 v vrega to gnd voltage vrega 7 v vregb to vcc voltage vregb 7 v out1, out2h to vcc voltage vouth 7 v out2l to gnd voltage voutl 7 v power dissipation pd 640 (*1) mw operating temperature ra nge topr -40 to +85 storage temperature range tstg -55 to +125 junction temperature tjmax +125 (*1) without heat sink, reduce to 6.4mw when ta=25 or above pd is 850mw mounted on 70x70x1.6mm, and reduce to 8.5mw/ above 25. recommended operating conditions (ta=-25 to +75 ) parameter symbol ratings unit min. typ. max. supply voltage vcc 6.0 - 30.0 v oscillating frequency fosc 30 100 300 khz timing resistance rt 10 27 56 k timing capacitance ct 100 470 4700 pf no.11028eat17
technical note 2/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV electrical characteristics (ta=25 , vcc=13.2v, fosc=100khz, ctl1=3v, ctl2=3v) parameter symbol limits unit condition min. typ. max. whole device stand-by current iccst 5 a ctl1,ctl2=0v circuit current icc 2.5 4.2 7 ma fb1,fb2=0v reference voltage vref output voltage vref 2.97 3.00 3.03 v io=-1ma line regulation dvli 10 mv vcc=7 to 18v,io=-1ma load regulation dvlo 10 mv io=-0.1ma to -2ma short output current ios -60 -22 -5 ma internal voltage regulator vrega output voltage vrega 4.5 5. 0 5.5 v switching with cout=5000pf vregb output voltage vregb vcc-5.5 vcc- 5.0 vcc-4.5 v switching with cout=5000pf vregb dropout voltage vdregb 1.8 2.2 v vregb to gnd voltage oscillator oscillating frequency fosc 90 100 110 khz rt=27k ,ct=470pf frequency tolerance dfosc 2 % vcc=7 to 18v synchronized frequency synchronized frequency fosc2 120 khz fin=120khz fin threshold voltage vthfin 1.2 1.4 1.6 v fin input current ifin -1 1 a vfin=1.4v error amplifier threshold voltage vthea 0.98 1.00 1.02 v inv input bias current ibias -1 1 a voltage gain av 70 db dc band width bw 2.0 mhz av=0db maximum output voltage vfbh 2.2 2.4 2.6 v inv=0.5v minimum output voltage vfbl 0.1 v inv=1.5v output sink current isink 0.5 2 5.2 ma fb1,2 terminal output source current isource1 -170 -110 -70 a fb1 terminal isource2 -200 -130 -85 a fb2 terminal
technical note 3/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV parameter symbol limits unit condition min. typ. max. pwm comparator threshold voltage at 0% vth0 0. 88 0.98 1.08 v fb voltage threshold voltage at 100% vth100 1.88 1.98 2.08 v fb voltage dtc input bias current idtc -1 1 a fet driver sink current isink 20 36 58 ma vds=0.4v source current isource -510 -320 -180 ma vds=0.4v on resistance ronn 7.0 11.0 17.8 out1,2h,2l : l ronp 0.7 1.4 2.2 out1,2h,2l : h rise time tr 20 nsec switching with cout=5000pf fall time tf 100 nsec switching with cout=5000pf driver?s duty cycle of synchronous rectification duty 42 45 48 % rsync=30k , 50% of main driver?s duty cycle sync terminal voltage vsync 1.45 1.55 1.65 v rsync=30k ,fb=1.5v over current protection (ocp) vs threshold voltage vths vcc-0.24 vcc-0.21 vcc-0.18 v rcl=21k , the output turn off after detected 8 cycle vs input current ivsh -1 1 a vs1,vs2=pbu ivsl -1 1 a vs1,vs2=0v cl input current icl 9 10 11 a stand-by threshold voltage vctl 1.0 1.5 2.0 v cl input current ictl 6 15 30 a ctl1,ctl2=3v short circuit protection (scp) timer start voltage vtime 0.6 0.7 0.8 v inv voltage threshold voltage vthscp 1.92 2.00 2.08 v scp voltage stand-by voltage vstscp 10 100 mv scp voltage source current isoscp -4.0 -2.5 -1.5 a scp=1.0v under voltage lock out (uvlo) threshold voltage vuvlo 5.6 5.7 5.8 v vcc sweep down hysteresis voltage range dvuvlo 0.05 0.1 0.15 v
technical note 4/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV pin description pin no. / pin name block diagram pin no. pin name description 1 fb1 error amplifier output pin(channel 1) 2 inv1 error amplifier negative input pin(channel 1) 3 rt oscillator frequency adjustment pin connected resistor 4 ct oscillator frequency adjustment pin connected capacitor 5 fin oscillator synchronization pulse signal input pin 6 gnd low-noise ground 7 vref reference voltage output pin 8 dtc1 maximum duty and soft start adjustment pin (channel 1) 9 dtc2 maximum duty and soft start adjustment pin (channel 2) 10 inv2 error amplifier negative input pin(channel 2) 11 fb2 error amplifier output pin(channel 2) 12 ctl1 enable/stand-by control input(channel 1) 13 ctl2 enable/stand-by control input(channel 2) 14 vcc main power supply pin 15 sync synchronous rectification timing adjustable pin 16 pgnd power ground (connected low-side gate driver and digital ground) 17 out2l low-side ( synchronous rectifier ) gate driver output pin(channel 2) 18 vrega connected capacitor for internal regulator 19 scp delay time of short circuit protection adjustment pin connected capacitor 20 vs2 over current detection voltage monitor pin (connected fet drain, channel 2) 21 cl2 over current detection voltage adjustment pin connected capacitor and resistor(channel 2) 22 pvcc2 high-side gate driver power supply input (channel 2) 23 out2h high-side gate driver output pin(channel 2) 24 vregb connected capacitor for internal regulator 25 out1 high-side gate driver output pin(channel 1) 26 pvcc1 high-side gate driver power supply input (channel 1) 27 cl1 over current detection voltage adjustment pin connected capacitor and resistor(channel 1) 28 vs1 over current detection voltage monitor pin (connected fet drain, channel 1) 28 27 26 25 24 23 22 21 20 19 18 1 2 3 4 5 6 7 8 9 10 11 fb1 inv1 rt ct fin gnd vref dtc1 dtc2 inv2 fb 2 vs1 cl1 pvcc1 out1 vregb out2h pvcc2 cl2 vs2 scp vrega 17 16 15 12 13 14 ctl1 ctl2 vcc out2l pgnd sync fig.1 pin description fig.2 block diagram
technical note 5/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV function explanation 1. dc/dc converter ? reference voltage stable voltage of compensated temperatur e, is generated from the power supply voltage (vcc). the reference voltage is 3.0v, the accuracy is 1%. place a capacitor with low esr (several decades m ) between vref and gnd. ? internal regulator a (vrega) 5v is generated the power supply voltage. the voltage is fo r the driver of the synchro nous rectification?s mosfet. place a capacitor with low esr (several decades m ) between vrega and pgnd. ? internal regulator b (vregb) (vcc-5v) is generated from the power supply voltage. the vo ltage is for the driver of the main mosfet switch. place a capacitor with low esr (several decades m ) between vregb and pvcc. ? oscillator placing a resistor and a capacitor to rt and ct, respective ly, generates two triangle waves for both cannels, and each wave is opposite phase. the waves are input to the pw m comparators for ch1 and ch2. also, the oscillating frequency can be slightly adjusted (less than 20%) by putting ex ternal clock pulse into fin pin, which is higher frequency than the fixed one. ? error amplifier it amplifies the difference, between the establish output volt age and the actual output one det ected at inv. and amplified voltage comes out from fb. the comparing voltage is 1.0v and the accuracy is 2%. the phase can be compensated externally by placing a resistor and a capacitor between inv and fb. ? pwm comparator it converts the output voltage from error amplifier into pwm waveform, then output to mosfet driver. ? mosfet driver the main drivers (out1, out2h) are for p-channel mosfets, and the driver (out2l) for sy nchronous rectification is for n-channel mosfet. the values of output voltage are clamp to vregb, vrega, respective ly. all drivers? output configurations are push-pull type. in addition, the output current capability is 36ma for the sink current and 320ma (vds=0.4v) for the source current. 2. channel control each output can be individually turned on or off with ctl1 a nd ctl2. when the ctl is ?h? (mo re than 1.5v), it becomes turned on. 3. protection ? over current protection(ocp) when detected over current (detecting drop voltage of the main mosfet?s on resistance), the mosfet switch becomes turned off, and the energy on dtc pin is discharged. after discharged, the output restarts automatically. the level of the ocp detection threshold can be set by the resistance, which is connected between vcc and cl. ? short circuit protection(scp) when either output goes down and the voltage on inv pin gets lower than 0.7v, a capacitor placed on scp is started to charge. when the scp pin becomes more than 2.0v, the main mosfet switches of both outputs are turned off; then, the outputs are latched. while they are latc hed, the ic can be reset by restarting vcc or ctl, or discharging scp. ? under voltage lock out(uvlo) due to avoiding malfunctions when the ic is started up or t he power supply voltage is rapidly disconnected, the main mosfet switches become off and dtc is discharged when t he supply voltage is less than 5.7v. also, when the output is latched because of scp function , the latch becomes reset. due to prev enting malfunctions in the case the power supply voltage fluctuate at near uvlo threshold, t here is 0.1v hysteresis betw een the detection and reset voltage of uvlo threshold. ? thermal shut down(tsd) due to preventing breakdown of the ic by heating up, the main mosfet switches become off and dtc pin is discharged by detecting over temperature of the chip. due to preventing malfuncti ons in the case temperature fluctuate at near tsd threshold, there is hysteresis between tsd on and off.
technical note 6/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV out2h out2l t1 t2 t setting up information 1) simultaneously off duty of mo sfets for synchronous rectification the simultaneously off duty of both main mosfet switch and synchronous rectification mosfet is determined by resistance (rsync) between sync and gnd. see fig.3. in synchronous rectification, insert rfb2-gnd (rfb2-gnd P 3 rsync) between fb2 and gnd, because it is possible to reduce overshoot(see fig.3). rfb2-gnd decides following formula. fig.3 ? resistance at fb2-gnd setup condition rsync(max) max dispersion range at rsync rsync(min) min dispersion range at rsync short sync to vref if the synchronous re ctification function is not needed. without synchronous rectif ication(don?t insert r fb2-gnd ) sync vref rsync sync fb2 r fb2-gnd 0 5 10 15 20 25 30 35 40 0 2040 6080100 rsync (k ? ) duty (%) t=-40 t= 25 t= 105 threshold voltage at100% < r fb2-gnd < 3xrsync(min) vsync 3 rsync(max) -output source current at fb2 2.08 0.4908 rsync(max) +80.7x10 - 6 r fb2-gnd < < 3xrsync(min)
technical note 7/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV 2) oscillator synchronization by external pulse signal at the operation the oscillator is externally synchronized, inpu t the synchronization signal into fin in addition to connect a resistor and a capacitor at rt and ct, respectively. input t he external clock pulse on fin, which is higher frequency than the fixed one. however, the frequency variation should be le ss than 20%. also, the duty cycle of the pulse should be set from 10% to 90%. fig.4 ct waveform during synchronized with external pulse short fin to gnd if the function of exte rnal synchronization is not needed. fig.5 without synchronization signal 3) setting the over current threshold level the ocp detection level (iocp) is determined by the on resistance (r on ) of the main mosfet switch and the resistance (rcl) which is placed between cl and vcc. iocp = 10 -5 [a] (typ.) to prevent a malfunction caused by noise, plac e a capacitor (ccl) parallel to rcl. if ocp function is not needed, short vs to vcc, and short cl to gnd. with ocp without ocp fig.6 cl, vs pin connection fin fin ct fixed with rt and ct synchronized cl vs vcc cl vs rcl vcc ccl to main mosfet drain rcl r on
technical note 8/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV 4) setting the time for short circuit protection the time (tscp) from output short to latch activation is de termined by the capacitor, cscp, connected scp pin. tscp=7.96 10 5 cscp [sec] (typ.) short scp to gnd if scp function is not being used. fig.7 without scp 5) single channel operation this device can be used as a single output. the connection is as follows; dtc, fb, ctl, cl short to gnd vs, pvcc short to vcc inv short to vref fig.8 single channel operation 6) setting the oscillating frequency the oscillating frequency can be set by selecting the ti ming resistor (rrt) and the timing capacitor (cct). fig.9 oscillating frequency vs. timing capacitance (cct) fig.10 oscillating frequency vs. timing capacitance (rrt) scp dtc fb ctl cl vs pvcc inv vref vcc 10 100 1000 10 100 1000 timing resistance (k ? ) oscillating fr equency ( khz) cct= 470pf cct=1000pf cct= 100pf 10 100 1000 100 1000 10000 timing capacitance( pf) oscillating fr equency ( khz) rrt=100k ? rrt=27k ? rrt=5.1k ?
technical note 9/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV timing chart ? output on/off, minimum input(uvlo) fig.11 ? over current protection, short circu it protection, thermal shut down fig.12 ctl1,2 scp dtc1,2 vout1,2 iout1,2 ocp is activated by detecting 8 consecutive cycles ocp detection level 1.0v 2.0v half short of output a ctivate scp inactivate half-short reset the latch by restarting ctl a ctivate tsd inactivate tsd 0.7 fixed output voltage vcc ctl1 ctl2 dtc1 dtc2 vout1 vout2 6.0v uvlo is inactivated at 5.8v stand-by soft start 1.0v 1.0v uvlo is activated at 5.7v
technical note 10/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV i/o equivalent circuit fb1(1) fb2(11) rt(3) vref vrega vcc fb1 vref vrega vcc vref rt vcc inv1(2),inv2(10) ct(4) fin(5) vcc vref inv1,2 vref vcc vreg a vcc fin dtc1(8),dtc2(9) ctl1(12),ctl2(13) sync(15) vrega vref dtc1,2 vcc vcc vrega ctl1,2 vref vcc sync scp(19) out2l(17),vrega(18) vref(7) vcc scp vref vcc vrega out2l vref vcc pvcc1(26),pvcc2(22) out1(25),out2h(23),vregb(24) vs1(28),vs2(20),cl1(27),cl2(21) vcc pvcc1,2 out1,2h vregb cl1,2 vs1,2 vcc fig.13
technical note 11/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV vcc pin bypass diode countercurrent prevention diode notes for use 1) absolute maximum ratings use of the ic in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in ic deterioration or damage. assumptions should not be made regarding the state of the ic (short mode or open mode) when such damage is suffered. a physical safety m easure such as a fuse should be implemented when use of the ic in a special mode where the absolute maximum ratings may be exceeded is anticipated. 2) gnd potential ensure a minimum gnd pin potential in all operating conditi ons. in addition, ensure that no pins other than the gnd pin carry a voltage lower than or equal to the gnd pi n, including during actual transient phenomena. 3) thermal design use a thermal design that allows for a sufficient margin in light of the power dissipati on (pd) in actual operating conditions. 4) inter-pin shorts and mounting errors use caution when orienting and positioning the ic for mounting on printed circuit boards. improper mounting may result in damage to the ic. shorts between output pins or between output pins and the power s upply and gnd pin caused by the presence of a foreign object may result in damage to the ic. 5) operation in a str ong electromagnetic field use caution when using the ic in the pr esence of a strong electromagnetic fiel d as doing so may cause the ic to malfunction. 6) thermal shutdown circuit (tsd circuit) this ic incorporates a built-in thermal shutdown circuit (tsd circuit). the tsd circuit is designed only to shut the ic off to prevent runaway thermal operation. do not continue to use the ic after operat ing this circuit or use the ic in an environment where the operation of the t hermal shutdown circuit is assumed. 7) testing on application boards when testing the ic on an application board, connecting a capa citor to a pin with low impedance subjects the ic to stress. always discharge capacitors after each process or step. ground the ic during assembly steps as an antistatic measure, and use similar caution when tr ansporting or storing the ic. always turn the ic's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 8) common impedance power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance). 9) applications with modes that reverse vcc and pin potentials may cause damage to internal ic circuits. for example, such damage might occur when vcc is shorted wi th the gnd pin while an external capacitor is charged. it is recommended to insert a diode for preventing back current flow in series with vcc or bypass diodes between vcc and each pin. fig.14 10) timing resistor and capacitor timing resistor (capacitor) connected between rt (ct) and gnd, has to be placed near rt (ct) terminal 3pin (4pin). and pattern has to be short enough. 11) the dead time input voltage has to be set more than 1.1v. also, the resistance between dtc and vref is used more than 30k ? to work ocp function reliably. 12) the energy on dtc1(8pin)and dtc2(9pin)is discharged when ctl1(12pin)and ctl2(13pin)are off, respectively, or vcc(14pin)is off (uvlo activation). however, it is cons iderable to occur overshoot when ctl and vcc are turned on with remaining more than 1v on the dtc.
technical note 12/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV 13) if gate capacitance of p-channel mosfet or resistance placed on gate is large, and the time from beginning of gate switching to the end of drain?s (tsw), is long, it may not start up due to the ocp malfunction. to avoid it, select mosfet or adjust resistance as tsw becomes less than 270nsec. fig.15 14) ic pin input this monolithic ic contains p+ isolation and pcb layers between adjacent elements in order to keep them isolated. p/n junctions are formed at the intersection of these p layers with the n layers of other elements to create a variety of parasitic elements. for example, when a resistor and transis tor are connected to pins as shown in following chart, the p/n junction functions as a parasitic diode when gnd > (pin a) for the resistor or gnd > (pin b) for the transistor (npn). similarly, when gnd > (pin b) for the transistor (npn), the parasitic diode described above combines with the n layer of other adjacent elements to operate as a parasitic npn transistor. the formation of parasitic elements as a result of the relationship s of the potentials of different pins is an inevitable resul t of the ic's architecture. the operation of parasitic elements can cause interference with circuit operation as well as ic malfunction and damage. for these reasons, it is necessary to use caution so that th e ic is not used in a way that will trigger the operation of parasitic elements, such as by t he application of voltages lowe r than the gnd (pcb) voltage to input and output pins. fig.16 tsw gate drain n p + (pina) resistor parasitic element p p + gnd p n (pinb) transistor (npn) p + p + n n p substrate gnd n p c e b parasitic element or transistor gnd c b parasitic element or transisto r (pinb) e (pina) parasitic element
technical note 13/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV thermal derating curve fig.17 0.0 0.2 0.4 0.6 0.8 1.0 0 25 50 75 100 125 150 ambient temperature: ta( ) power dissipation : pd w) 0.64 0.85 with no heat sink copper laminate area 70 mm 70mm
technical note 14/14 www.rohm.com 2011.05 - rev. a ? 2011 rohm co., ltd. all rights reserved. BD9775FV ordering part number b d 9 7 7 5 f v - e 2 part no. part no. package fv: ssop-b28 packaging and forming specification e2: embossed tape and reel (unit : mm) ssop-b28 0.1 0.15 0.1 0.1 1.15 0.1 1 0.65 7.6 0.3 5.6 0.2 28 10 0.2 (max 10.35 include burr) 0.3min. 14 15 0.22 0.1 ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2000pcs e2 () direction of feed reel 1pin
r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redundancy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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